ShortStack ReadMe File
Release 2 Service Pack 1, February 2005
Copyright © 2004 – 2005 Echelon Corporation.
All Rights Reserved.
This file describes ShortStack 2 Service Pack 1. This service provides critical updates to the ShortStack Developer’s Kit, and is particularly important for Echelon PL Smart Transceiver users. Additional information and updates, including critical updates, may be available on the ShortStack Web page at www.echelon.com/shortstack. See Echelon’s Knowledge Base at www.echelon.com/support for answers to frequently asked questions.
2.1 New ShortStack MicroServer Images
2.2 Incorrect Micro Server Default Clock Rates
2.3 Increased Number of Application Input Buffers and Buffer Size
3 Known problems and workarounds
3.1 Support_for_PL 3120 A-Band
3.2 Incorrect XIF file for PL 3120 A-Band devices
3.3 Drivers Left in Sleep State After Initialization
3.4 Downlink and Uplink Collision Problem
3.6 Odd SCI Baud Rates for PL 3120 A-Band
4.2 GP32 _RTS and _CTS Signals Swapped
1. Verify that you have Release 2 of the ShortStack Developer’s Kit installed on your computer.
2. From Windows explorer, double-click the ShortStack20SP1.exe file.
3. If the drive letter of your existing LonWorks root directory differs from the default C:\, enter the drive letter of your existing LonWorks root directory (i.e., E:\) and click the Unzip button to install the replacement files into your ShortStack directory.
4. When prompted with the 57 file(s) unzipped successfully dialog box, click the OK button.
Return to Contents.
This section describes the changes installed by Service Pack 1. Numbers in parentheses at the end of the change descriptions are Echelon's internal problem tracking IDs. See the ShortStack 2 ReadMe file for a list of additional known problems and workarounds.
Support for Echelon PL 3120 Smart transceivers and 10 MHz 3150 have been added.
This service pack release does not support PL 3150 Smart Transceivers. (EPR 34970)
|
Chip Type |
FW Ver. |
Def. Xcvr |
NodeBuilder Neuron Chip Model |
Off-chip Memory |
Clock Frequencies (MHz) |
||||||
|
|
|
|
|
Type |
Sector Size |
Addr. |
5 |
6.55 |
10 |
20 |
40 |
|
3120E4 |
13.0 |
FT |
CY7C53120E4 |
|
|
|
X |
|
X |
X |
X |
|
PL 3120 |
14.0 |
PL-20C |
PL3120-E4 |
|
|
|
|
|
X |
|
|
|
PL 3120 |
14.0 |
PL-20A |
PL3120-E4 |
|
|
|
|
X |
|
|
|
|
CY7C53120L8 |
15.0 |
FT |
CY7C53120L8 |
|
|
|
X |
|
X |
X |
|
|
3150 |
15.0 |
FT |
3150 |
Flash |
128-byte |
0 – 0x7FFF |
|
|
X |
|
|
NOTE: MicroServer images shipped with this service pack have been tested using a 68HC908GP32 running at 8 MHz in SCI mode and 16 MHz in SPI mode.
ShortStack 2 Micro Server images were configured to use default transceiver parameters and clock frequencies that sometimes caused watchdog and flash memory problems if the selected transceiver type or clock speed did not match the default. This service pack release includes Micro Server images with a larger selection of default transceiver parameters and clock speeds. The final transceiver parameters and clock speed setting for a ShortStack device are still configured by the ShortStack host during initialization. (EPR 34979)
ShortStack 2 Micro Server images were configured to have 2 application input and 2 application output buffers with a buffer size of 50 bytes. This service pack release increases the application input buffer count to 5, and increases the application input and output buffer sizes to 66 bytes. (EPR 35912)
Return to Contents.
The Release 2 ShortStack Wizard does not support the creation of PL 3120 devices running at 6.5536MHz in A-Band. Workaround: See the pl3120_shortstack201_workaround.pdf file included in this service pack. (EPR 35491)
The Release 2 ShortStack Wizard does not encode the proper processor information into the external interface (XIF) file for PL 3120 A-Band devices. Workaround: See the pl3120_shortstack201_workaround.pdf file included in this service pack. (EPR 35491)
The ShortStack 2 host example drivers for SPI and SCI incorrectly leave drivers in the DRV_SLEEP state upon returning from initialization (in the SysInit() function in both ldvsci.c and ldvspi.c). This may lead the driver into a condition where it is awakened from its DRV_SLEEP state in the middle of a message transmission and cause the driver to become out-of-synch with the ShortStack Micro Server, eventually resetting the Micro Server. Workaround: Insert the following code at the end of the SysInit() function in ldvsci.c and ldvspi.c, just after SysEnableInterrupts() is called. (EPR 35913)
…
SysEnableInterrupts();
// wait for driver to wakeup from SLEEP
while (G_DriverStatus.drv_state == DRV_SLEEP)
SysUpdateWDT();
}
The ShortStack host example driver for SPI may not properly handle SPI host to Micro Server data transfer with write collisions (see the ShortStack user’s guide, pages 4-7 and 4-8) on a slow 8-bit microcontroller like a 16F877 PIC or an 8-MHz Motorola MC68HC908GP32. On these slow microcontrollers, there is a risk of data underrun when the Micro Server completes its data transmission and immediately starts clocking in data from the host. In this case, the slow host may still be busy queuing the last received packet from the Micro Server and has therefore not reloaded the first byte into its Transmit Holding Register when the Micro Server clocks in the first byte from the host. This may lead the Micro Server into reading incorrect length byte and get out-of-synch with the host. Workaround: Use a faster microcontroller (faster clock speed) or preload the Transmit Holding Register with the first byte of the outgoing packet whenever the SPI driver receives incoming bytes from the Micro Server, and an outgoing packet is ready to send. (EPR 35473)
The ShortStack
2 installation software installs outdated versions of the standard resource
files and may incorrectly overwrite existing newer files. If you install
ShortStack 2 after installing any of Echelon’s LonWorks
Windows-based software products such as the LNS Application Developer’s Kit,
LonMaker, NodeBuilder, or i.LON
100, these files will be overwritten with older, out of date versions. Workaround:
Re-install any Echelon LonWorks Windows-based
software after installing the ShortStack 2
Developer’s Kit to restore these files to their latest versions. Without
the correct version of these files, those products may not be able to operate
properly. (EPR 35320)
The software SCI bit rate for the PL 3120 Smart Chip is determined by IO 5 – 6 and the Neuron input clock rate according to the following table. Not all host microcontrollers will be able to operate their SCI at these odd bit rates when the PL 3120 Smart Transceiver is configured to run in A-Band. Workaround: If the odd SCI bit rate is a problem, use an SPI interface.
|
IO6 |
IO5 |
Baud Rates for PL 3120 (A-Band) with 6.5536MHz Clock |
Baud
Rates for PL-3120 (C-Band) |
|
GND |
GND |
50,331 |
76,800 |
|
GND |
VDD |
25,166 |
38,400 |
|
VDD |
GND |
12,583 |
19,200 |
|
GND |
GND |
6,291 |
9,600 |
Return to Contents.
The following files are included in this Service Pack for each MicroServer Image:
a. image_name.XIF – Device interface (XIF) file.
b. image_name.SYM – Device symbol file (used only by the ShortStack Wizard).
c. image_name.NXE – ShortStack Micro Server downloadable firmware image file for 3120 and 3150 chips using network management tools such as the LonMaker tool.
d. image_name.NFI – ShortStack Micro Server programmable firmware image file for 3120 chips using a universal chip programmer.
e. image_name.NEI – ShortStack Micro Server firmware image file (for 3150 chips using a universal chip programmer or for 3120 chips using image download tools).
The _RTS and _CTS
GP32 signals in Figure C-3 of the ShortStack User’s Guide Version 2
(March 2002) should be swapped as shown below:
|
Port |
GP32 Signal |
Neuron Pin |
Neuron Signal |
|
PTC6 |
_RTS ----------10k pull-up---------- |
IO4 |
RTS* |
|
PTA6 |
_CTS ----------10k pull-up---------- |
IO0 |
CTS* |
|
PTE0 |
TXD ----------10k pull-up---------- |
IO8 |
RxD |
|
PTE1 |
RXD ----------10k pull-up---------- |
IO10 |
TxD |
|
PTC5 |
_HRDY ----------10k pull-up---------- |
IO1 |
|
|
Vss |
GND ---------------------------------- |
GND |
|
|
Vdd |
+5V Use for pull-ups |
|
|
Figure C-3: GP32 to Micro Server Connections for an SCI Interface
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